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Communication problem with a large number of modules with AO on the bus

With a larger number of modules with analog outputs (MCIO2, MXIO, …) and at the same time when they are used (meaning the AOs themselves) in the project, it may happen that due to frequent writing to AO registers it is no longer possible to read other registers from modules, in such a way that HW data points are not refreshed (or only very rarely) . We can easily verify this status using the port monitor

But help is obvious. It is necessary to set the appropriate hysteresis for AO for writing, because otherwise it is written to A0 at each change detected in the next calculation cycle RT.